Morning Overview

TSMC just built a transistor layer four-tenths of a nanometer thick, cracking the path past silicon

A research team working with the world’s largest contract chipmaker has demonstrated a way to build a critical part of a transistor at a thickness of just over four-tenths of a nanometer, a scale so small it is measured in individual atoms. The advance, reported in August 2026, tackles one of the most stubborn obstacles standing between today’s silicon chips and the atomically thin materials many engineers believe will eventually succeed them. It does not mean a commercial sub-one-nanometer manufacturing process is ready, but it addresses a bottleneck that has frustrated the field for more than a decade.

The work centers on a class of materials known as two-dimensional semiconductors, which can be as thin as a single layer of atoms while still carrying electrical current. Those materials have long promised smaller, faster, and more efficient transistors, yet a persistent problem at the boundary between materials has kept them from living up to that promise. The new results suggest a route around it.

Why silicon is running into a wall

For decades, the semiconductor industry has advanced by making transistors ever smaller, packing more of them onto each chip. As those devices approach atomic dimensions, silicon becomes harder to scale, and each new generation delivers smaller gains. A description of the research published by ScienceDaily notes that atomically thin semiconductors such as monolayer molybdenum disulfide, often written as MoS2, offer a possible way forward because their channels can be a single atom thick without losing useful electronic behavior. The catch has been that building a working transistor from such a material requires adding an extremely thin insulating layer, called a gate dielectric, without wrecking the delicate interface where the two materials meet.

The interface that made the difference

Rather than searching for a better semiconductor or a different insulator, the researchers focused on the narrow region where those two materials touch, an area only a few atoms thick. The team, from National Yang Ming Chiao Tung University in Taiwan working with TSMC Corporate Research, placed an ultrathin layer of aluminum directly onto monolayer MoS2 and then carefully oxidized it, producing an aluminum-oxide buffer about 0.42 nanometers thick, according to the study summary. That buffer did two jobs at once: it created a smooth surface so the main hafnium-oxide insulator could grow evenly, and it shielded the flow of electrons from the electrical disorder that normally degrades performance at such boundaries. For context, a single strand of DNA is roughly 2.5 nanometers wide, so the engineered layer is a small fraction of that.

What the resulting transistors could do

Using that interface design, the researchers fabricated short-channel transistors from lab-grown monolayer MoS2 with an effective insulating thickness of about one nanometer. The devices showed low leakage current, minimal electrical instability, and a strong combination of gate control and carrier mobility, a balance that has been notoriously difficult to achieve in atomically thin transistors. The findings were published in the peer-reviewed journal Nature Electronics, which lends weight to results that might otherwise be dismissed as a one-off laboratory curiosity. Crucially, the team used chemically grown films rather than tiny hand-peeled flakes, a choice meant to bring the approach closer to the wafer-scale processes real manufacturing would require.

How far this is from a finished chip

Independent coverage of the result has been careful to temper expectations. An analysis on the industry site SemiWiki frames the work as a meaningful step toward two-dimensional electronics rather than the arrival of a commercial process, noting that the fabrication method still must be optimized for large-scale production. The 0.42-nanometer figure describes the thickness of the interface layer, not a new manufacturing node or a marketing label like the numbers used to name today’s process generations. TSMC has not announced a product built on the technique, and the researchers themselves say more work is needed before the process could be scaled up.

Why the result still matters

Even as a laboratory demonstration, the work points to a broader shift in how chip designers think about scaling. For years the emphasis has been on discovering new semiconductor materials or shrinking existing ones; this result argues that the atomic interfaces connecting different materials can be just as important, and that engineering those boundaries with atomic precision may unlock performance that changing individual materials alone cannot. As transistor components shrink toward the size of a handful of atoms, the thin regions where materials meet stop being passive borders and start acting as functional parts of the device. That reframing, more than any single measurement, is what makes the finding a notable marker on the long path beyond conventional silicon.

Where it fits in the wider race

The result lands amid a broader industry push toward materials and structures that can carry Moore’s Law-style gains past the point where silicon stalls. Independent coverage by SciTechDaily described the engineered boundary as one of the thinnest transistor interfaces yet demonstrated, and it echoed the researchers’ own caution that turning a laboratory device into a manufacturable product remains a multiyear challenge. What distinguishes this work from incremental tweaks is that it reframes the interface between materials as an active component to be designed, a mindset that could apply well beyond the specific molybdenum-disulfide device the team built.

This article was produced with AI assistance and reviewed by Morning Overview editors.


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