TSMC is pushing hard to ramp semiconductor production at its overseas factories in 2026, with industry estimates pointing to an 80% output increase at its Arizona fabrication plant and a 130% surge at its facility in Kumamoto, Japan. The projected gains, drawn from analyst models and supply chain channel checks, reflect the Taiwanese chipmaking giant’s most aggressive overseas expansion in its nearly four-decade history. They also arrive at a moment when demand for advanced chips powering artificial intelligence workloads has strained global foundry capacity and intensified pressure on TSMC to manufacture closer to its biggest customers.
Where the numbers come from
The 80% and 130% figures do not appear in TSMC’s own regulatory filings. The company’s Form 20-F annual report for fiscal year 2025, filed with the U.S. Securities and Exchange Commission, confirms that overseas expansion is a strategic priority and catalogs risks that could slow production ramps. Its first-quarter 2026 earnings presentation provides aggregate wafer shipment volumes and revenue breakdowns by technology node but does not isolate output by geography.
Instead, the site-level growth projections circulate through semiconductor analyst reports and supply chain checks. These sources model output trajectories based on equipment installation timelines, wafer start estimates, and yield assumptions. They can be well-informed, but they rest on assumptions about execution that TSMC itself has not publicly endorsed at the site level. That distinction matters for investors and procurement teams making decisions based on these numbers.
What TSMC has confirmed
While TSMC has not published fab-by-fab output targets, the company has been unusually transparent about the scale of its overseas commitments. In Arizona, TSMC has pledged more than $65 billion in total investment across three planned fabrication plants near Phoenix. Fab 21’s first phase began producing chips on the company’s 4-nanometer process (N4P) in 2025, serving customers that include Apple and Nvidia, according to the company’s public announcements. A second phase targeting advanced 2-nanometer-class technology is under construction, with a third phase also planned.
The U.S. Commerce Department has awarded TSMC up to $6.6 billion in direct funding under the CHIPS and Science Act, along with up to $5 billion in loans, to support the Arizona buildout. Those federal commitments come with production milestones that TSMC must meet, creating an external accountability mechanism beyond the company’s own guidance.
In Japan, TSMC operates through JASM, a joint venture with Sony Semiconductor Solutions and Denso. JASM’s first fab in Kumamoto began volume production in early 2025 on mature process nodes, including 12/16nm and 22/28nm technology, serving automotive and industrial customers. A second Kumamoto fab targeting more advanced 6/7nm production is under construction, backed by substantial subsidies from Japan’s Ministry of Economy, Trade and Industry. The Japanese government views domestic chip manufacturing as a national security priority and has committed billions of dollars to support it.
“We are entering a period of strong structural demand for leading-edge silicon, and geographic diversification of manufacturing is no longer optional for the industry,” TSMC Chairman and CEO C.C. Wei said during the company’s first-quarter 2026 earnings call, underscoring management’s commitment to the overseas buildout.
These verified commitments explain why large percentage output gains are plausible. Both the Arizona and Kumamoto operations are ramping from relatively low initial production bases, where even modest increases in absolute wafer volumes translate into dramatic percentage jumps. An 80% increase at a fab that produced a small number of wafers in its first partial year of operation is a very different story than an 80% increase at a mature, high-volume plant running at scale.
The risks TSMC flags itself
TSMC’s annual report does not sugarcoat the obstacles facing its overseas fabs. The company identifies supply chain disruptions, utility availability, and operational interruptions as material risks to production ramps outside Taiwan.
In Arizona, water and energy reliability are persistent concerns. The desert Southwest faces long-term water stress, though TSMC’s site selection and Arizona’s allocation agreements for semiconductor manufacturing have addressed near-term supply. Energy costs in the region run higher than in Taiwan, and the power-intensive nature of advanced chip fabrication means that electricity pricing and grid reliability directly affect operating economics. Construction labor shortages and the challenge of training a local semiconductor workforce from scratch have also slowed timelines in the past.
In Japan, JASM must navigate a tight domestic labor market and the logistics of coordinating with TSMC’s primary operations in Taiwan, where the company’s most experienced process engineers are concentrated. Integrating a new overseas fab into TSMC’s tightly optimized supply network is not a trivial exercise, even with strong local partners like Sony and Denso providing support.
Either set of risks could slow the projected ramp. The percentage growth estimates circulating among analysts generally assume smooth execution, and any disruption to equipment installation, chemical supply, or workforce readiness would compress the actual gains.
What customers and investors should watch
For companies that depend on TSMC as a foundry partner, the practical signal is clear: overseas capacity is growing, and both Arizona and Japan are on track to contribute meaningfully to TSMC’s global output over the next several quarters. But the pace remains subject to execution risk that the company itself has flagged in regulatory filings.
AI chip designers, smartphone makers, and automotive companies planning supply chains around Arizona or Kumamoto output should build in contingency for potential delays. That could mean qualifying alternative foundry partners for less critical products, maintaining higher safety stock, or structuring contracts with flexibility around delivery schedules.
A key question the filings leave unanswered is exactly which process nodes each overseas fab will prioritize over specific timeframes. TSMC describes its technology mix at a consolidated level but does not spell out geographic node allocation in its public disclosures. For customers who care less about total wafer starts and more about access to cutting-edge 3nm or 2nm capacity, this is a meaningful blind spot.
Investors should anchor their analysis in TSMC’s primary filings rather than headline figures that lack clear provenance in regulatory disclosures. The first-quarter 2026 earnings materials provide a consistent view of overall wafer shipments, revenue mix, and capital expenditure that can be used to stress-test more aggressive site-level projections. When secondary sources cite sharp percentage growth for Arizona or Japan, the disciplined move is to ask what baseline those numbers assume and whether they account for the risks TSMC has highlighted.
Confirmed direction, unconfirmed precision
TSMC is clearly shifting manufacturing weight outside Taiwan at a pace and scale the company has never attempted before. Tens of billions of dollars in corporate investment, billions more in government subsidies on two continents, and partnerships with some of the world’s largest chip buyers all point in the same direction. The 80% and 130% output growth estimates for Arizona and Japan are consistent with the early-stage ramp dynamics at both sites, but they remain analyst projections, not company-verified guidance. Until TSMC chooses to disclose more granular geographic data, customers and investors will need to distinguish carefully between what the company has formally stated and what the market is inferring around it.
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*This article was researched with the help of AI, with human editors creating the final content.
